The present invention relates to resolution of data signals and, more particularly, to a method and apparatus for increasing data resolution without the need for communicating high resolution signals throughout a circuit.
Contemporary information systems operate to process large amounts of information in relatively short periods. In order to facilitate that processing the system must operate at high speeds with the various circuit components coordinated to cooperatively transfer data at those speeds. For example, a high frequency sampling circuit requires high frequency clock pulses and high resolution control signals to facilitate sampling of information with each clock pulse. Control signals may be communicated to various types of processing circuitry, e.g. circuitry that performs the sampling or circuitry that operates on the sampled information to sum that information, average the information, etc. Consequently the individual circuits must be constructed, and the data, control and clock signals synchronized to be communicated to the various circuit portions at the correct time in order to permit the proper flow of information through the circuit.
Difficulties with respect to synchronizing the arrival of data, control and clock signals to the various circuit components become particularly acute as the speed of the system and the complexity of the system increase. For example, where a high frequency clock signal has to be communicated to each device of a synchronous system, delays inherent in passing the signal through device package pins, module connector pins, sockets, printed wiring board traces, connective cabling, semiconductor devices, and other circuit elements cause the clock pulses to arrive at different devices in the communication network out of sync (this is known as clock skew). Consequently, the potential resolution obtainable by the system based on system clock frequency is inherently limited by propagation delays, clock skew and other characteristics of the system. In some instances such characteristic limitations may cause the particular circuit portions to fail to process the data as required. For example, where the correct high frequency clock pulse does not arrive at a particular circuit portion in the required window to register a high frequency data signal, data will be input into the circuit component on the wrong clock edge thereby skewing the data by one clock period. In high frequency systems minor signal propagation delay variances due to temperature variances, device process variances, physical manufacturing tolerances, etc. become significant. Such variances can cause uncertainty as to which clock edge will register critical data signals. This uncertainty results in incorrect information transfer as well as jitter, both of which degrade system performance to an unacceptable level.
Contemporary circuits communicate the high frequency clock and control signals throughout the various circuit portions in order to obtain high frequency resolution of the data. Difficulties arise with respect to the operation of contemporary systems in that the short period of the high frequency clock signal enhances the possibility that, as a result of clock skew, propagation delays and other factors, the clock and control signals may arrive at a device out of sync. Though contemporary systems attempt to correct for such synchronization difficulties, the delay elements and other devices used to implement such corrective steps (themselves having characteristic delay uncertainty or variance) are frequently inadequate to provide the desired degree of reliability and remain limited by the short periods of the high frequency clock signal.
Accordingly, it is desirable to provide a device for transferring data that permits high resolution of the data without the need to synchronize high frequency signals, to minimize potential loss of data attributable to clock skew, propagation delays and the like.
It is further desirable to provide a high resolution data transfer system that utilizes lower frequency signals to communicate the data and to obtain the desired resolution.
It is further desirable to provide a high resolution system wherein the desired degree of resolution may be varied in accordance with the needs of a particular application, while utilizing common low frequency signals in circuit portions requiring lower resolution.
It is further desirable to provide a high resolution system that requires lower power dissipation and less high frequency logic to obtain a desired degree of resolution.
These and other objects and advantages of the present invention are described below in connection with the embodiment described below.